A 109.5mW 1.2V 600M texels/s 3-D graphics engineIMAI, Masatoshi; NAGASAKI, Tanio; UEDA, Tohru et al.IEEE International Solid-State Circuits Conference. 2004, pp 332-333, isbn 0-7803-8267-6, 2Vol, 2 p.Conference Paper

Platforms : a way to get aboard the express trainGRAY, Mark.Sophia Antipolis forum on microelectronics. 2002, pp 135-139, 1Vol, 5 p.Conference Paper

Système complet sur une puce et réutilisation de blocs = System on chip and block reuseHANCZAKOWSKI, Antoine.Techniques de l'ingénieur. Electronique. 2001, Vol 2, Num E2468, pp E2468.1-E2468.4, issn 0399-4120Article

Supply current spectrum estimation of digital cores at early designBLAKIEWICZ, G; CHRZANOWSKA-JESKE, M.IET circuits, devices & systems (Print). 2007, Vol 1, Num 3, pp 233-240, issn 1751-858X, 8 p.Article

Automatic synthesis of zero-aliasing space compactors with application to testing of embedded IP coresSOLANA, José M; FRECHOSO, Javier.Proceedings of SPIE, the International Society for Optical Engineering. 2007, pp 65900R.1-65900R.11, issn 0277-786X, isbn 978-0-8194-6718-8, 1VolConference Paper

Distributed collaborative design of IP components in the TRMS environmentSIEKIERSKA, K; FRAS, P; KOKOSZKA, A et al.Microelectronics and reliability. 2006, Vol 46, Num 5-6, pp 1019-1024, issn 0026-2714, 6 p.Article

High throughput and low power FIR filtering IP coresWANG, C. H; ERDOGAN, A. T; ARSLAN, T et al.IEEE Systems-on-chip conference. 2004, pp 127-132, isbn 0-7803-8445-8, 1Vol, 6 p.Conference Paper

Efficient test data compression and low power scan testing in SoCsJUNG, Jun-Mo; CHONG, Jong-Wha.ETRI journal. 2003, Vol 25, Num 5, pp 321-327, issn 1225-6463, 7 p.Conference Paper

A design methodology for integrating IP into SOC systemsCOUSSY, Philippe; BAGANNE, Adel; MARTIN, Eric et al.Custom integrated circuits conference. 2002, pp 307-310, isbn 0-7803-7250-6, 4 p.Conference Paper

The systolic ring : A scalable dynamically reconfigurable core for embedded systemsBENOIT, Pascal; SASSATELLI, Gilles; ROBERT, Michel et al.Sophia Antipolis forum on microelectronics. 2002, pp 85-90, 1Vol, 6 p.Conference Paper

Tabled logic programming based IP matching tool using forced simulationROOP, P. S; SOWMYA, A; RAMESH, S et al.IEE proceedings. Computers and digital techniques. 2004, Vol 151, Num 3, pp 199-208, issn 1350-2387, 10 p.Article

Design and implementation of a parameterizable LDPC decoder IP coreMURPHY, G; POPOVICI, E. M; BRESNAN, R et al.International conference on microelectronics. 2004, isbn 0-7803-8166-1, 2Vol, vol 2, 747-750Conference Paper

Register isolation for synthesizable register filesMÜLLER, Matthias; WORTMANN, Andreas; MADER, Dominik et al.Lecture notes in computer science. 2004, pp 228-237, issn 0302-9743, isbn 3-540-23095-5, 10 p.Conference Paper

Constructing IP cores' transparency paths for SoC test access using greedy searchJIANHUI XING; HONG WANG; SHIYUAN YANG et al.Microelectronics and reliability. 2006, Vol 46, Num 7, pp 1199-1208, issn 0026-2714, 10 p.Article

Interfacing methodologies for IP re-use in reconfigurable system-on-chipLEE, Tien-Lung; BERGMANN, Neil W.SPIE proceedings series. 2004, pp 454-463, isbn 0-8194-5167-3, 10 p.Conference Paper

A powerful dual-mode IP core for 802.11a/b wireless LANsEFTIMAKIS, Michel.Sophia Antipolis forum on microelectronics. 2002, pp 124-129, 1Vol, 6 p.Conference Paper

Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan ChainsKAVOUSIANOS, Xrysovalantis; KALLIGEROS, Emmanouil; NIKOLOS, Dimitris et al.IEEE transactions on very large scale integration (VLSI) systems. 2008, Vol 16, Num 7, pp 926-931, issn 1063-8210, 6 p.Article

Wrapper design for multifrequency IP coresQIANG XU; NICOLICI, Nicola.IEEE transactions on very large scale integration (VLSI) systems. 2005, Vol 13, Num 6, pp 678-685, issn 1063-8210, 8 p.Article

Generation of processor interface for SoC using standard communication protocolCYR, G; BOIS, G; ABOULHAMID, M et al.IEE proceedings. Computers and digital techniques. 2004, Vol 151, Num 5, pp 367-376, issn 1350-2387, 10 p.Article

The A to Z of SoCsBERGAMASCHI, Reinaldo A; COHN, John.Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design. 2002, pp 791-798, issn 1092-3152, isbn 0-7803-7607-2, 8 p.Conference Paper

Regaining Trust in VLSI Design: Design-for-Trust TechniquesRAJENDRAN, Jeyavijayan; SINANOGLU, Ozgur; KARRI, Ramesh et al.Proceedings of the IEEE. 2014, Vol 102, Num 8, pp 1266-1282, issn 0018-9219, 17 p.Article

Systematic studies on fractal scan model for Flat Panel Display (FPD) controllersXU, M; RAN, F; CHEN, Z et al.International journal of manufacturing research (Print). 2011, Vol 6, Num 4, pp 367-379, issn 1750-0591, 13 p.Article

SIPv6 analyzer : an analysis tool for 3GPP IMS servicesCHEN, Whai-En; SUNG, Yueh-Hsin; LIN, Yi-Bing et al.Wireless communications and mobile computing (Print). 2008, Vol 8, Num 2, pp 245-253, issn 1530-8669, 9 p.Article

Wrapper scan chains design for rapid and low power testing of embedded coresHAN, Yinhe; HU, Yu; LI, Xiaowei et al.IEICE transactions on information and systems. 2005, Vol 88, Num 9, pp 2126-2134, issn 0916-8532, 9 p.Article

Infrastructure for modular SOC testingMARINISSEN, Erik Jan; WAAYERS, Tom.Custom integrated circuits conference. 2004, pp 671-678, isbn 0-7803-8495-4, 1Vol, 8 p.Conference Paper